1. Field of the Invention
The present invention generally relates to the manufacture of electrical devices and, more particularly, to the automated optical inspection of metal patterns on an underlying structure or substrate.
2. Discussion of the Related Art
Fabrication of electrical and electronic devices which have included a layer of metal connections formed on an underlying layer or substrate has been a well-known practice. Printed circuits are a well-known example of such structures. Integrated circuits also include similar structures but of a much smaller size. Improvements in materials technology and semiconductor metallurgy, in particular, has resulted in ever greater degrees of miniaturization, circuit complexity and feature density in electrical devices which include such conductors.
As circuit complexity has increased, sophisticated electrical and optical methods of testing for defects have been developed in order to detect defects of a scale comparable to the feature size of the connector pattern formed. Automation of these techniques has become a practical necessity due to the number of connections usually present. These automated techniques have been generally effective in detecting actual defects in the pattern.
Electrical continuity testing is often effective and efficient in discovering defects in connection patterns since a network of signal lines may be simultaneously tested. However, there are many types of defects such as shorts to the same node and thin areas of a conductive pattern which cannot be easily detected by electrical testing. Further, the cost and complexity of some circuit modules currently being manufactured makes it economically desirable to repair defective circuits when a defect is discovered and electrical continuity testing rapidly becomes arduous if used to locate the defect for repair. For this reason, optical testing to compare a manufactured connection pattern with an intended pattern has been developed and successfully used to locate actual circuit defects. It should be noted that the location of defects may also be useful in the modification of conductor pattern designs in the manufacturing of devices which are of a scale at which repair is not, in fact, feasible. Since the optical scanning and comparison of an actual pattern with a desired pattern does not vary in procedure with the connection pattern formed, optical testing becomes economically advantageous as pattern complexity increases.
It is to be understood that optical testing equipment is commercially available to automate the testing process. Such equipment is capable of detecting variations in optically sensed patterns of a size sufficient to test patterns with any minimum feature size currently being produced and capable of detecting the shape of a variation from a desired pattern in any orientation in an automated manner. However, due to the similarity of dimension of acceptable manufacturing variation to variations in sensed patterns caused by defects, such equipment tends to reject some good patterns while passing some containing defects. Both types of errors tend to increase the cost of the circuits produced and reduce the efficiency of the manufacturing process.
The illumination used in optical testing of surface patterns include so-called dark field and bright field illumination techniques used either separately or together and at different spectral frequencies in the optical testing of circuit connection patterns. Bright field illumination is very sensitive to variations in surface topology and results in many imaging artifacts representing acceptable variations in topology and which may cause difficulty in analysis of images and many false defect detections. On the other hand, dark field illumination is problematic, in that, image contrast would generally be low, leading to a low signal to noise ratio of a reflected image of an optically scanned circuit connection pattern. In the latter instance, the circuit connection pattern may also not be easily discernable from any underlying layers.
Several different forms of image analysis are typically used in a battery of tests to determine if a connection pattern which has been produced is of acceptable quality and free from defects. However, the discovery of defects at low rates of false detection and undetected faults has been particularly difficult to achieve since many defects yield images similar to those produced as portions of a correctly formed desired pattern.
In addition to the above discussion, high density multilayer thin film structures, such as multilayer chip modules (MCMs), may include a number of high density patterned layers (e.g., 50-70 layers). For purposes of discussion, high density shall refer to patterned wiring layers in which a spacing between adjacent wires (i.e., lines), a line width, and the height on a line are all about on the same order. The layers of the MCMs may include thin film wiring layers which run predominately in the horizontal and/or vertical direction. Examples of such layers include xyz layers which may further be sandwiched between thin film mesh type voltage planes. Such MCMs are prone to significant yield losses due to shorts and opens, if the defects are not repaired early enough in a manufacturing process thereof. Electrical test is typically limited in detecting electrical defects until such time as the MCM is completely manufactured, at which time, a repair might be too late. Manual inspection may also be limited because the MCMs may be exceedingly complex and dense. The MCMs furthermore typically include a non-planar and significant topology. Remnants of underlying layers can be seen through intermediate layers, such as polyimides, which may make manual visual inspection very ineffective and problematic. In addition, the significant topology of the part being inspected and images from underlying layers, likewise, make it difficult to automatically inspect such MCMs. While most inspection techniques utilize bright illumination and require that the part being inspected be planar, the same inspection techniques are typically ineffective for inspection for opens and shorts of a wiring pattern on a MCM because of the low contrast image of the patterned metalization layer on the MCM.
Feature extraction optical inspection testing techniques are known in the art. For instance, a particular list of features can be used during an inspection, wherein the features may include line ends, junctions, or some other particular feature. The feature list may typically includes an x-y coordinate and the type of feature at the corresponding x-y coordinate. During processing of a feature extraction optical inspection, a report list is generated which typically reports all extra features and all missing features. However, for a low contrast image inspection (for example, MCM part inspection), such an optical inspection technique is highly susceptible to errors when the image of the pattern being inspected fades away. Furthermore, in the instance of low contrast images, the distinction between metal and not-metal is not easily discernable.
An example of MCM substrates having low contrast layers include complex dense x and y signal layers of an MCM substrate. The MCM substrates of this type present a screening problem as a result of excessive topology, in addition to, the thinness of an underlying intermediate polyimide layer. Such an MCM substrate is highly susceptible to the occurrence of defect coupling, i.e., the detecting of shorts and overflowing on opens and vice versa. It would thus be desirable to provide an effective method for screening of dense thin film signal layers of MCM substrates for shorts, opens, near shorts, and near opens with minimal defect coupling.